Ming Cheng (成铭)
Address: 4-205,Rohm Building,Tsinghua University,Beijing,China
- TIME: A Training-in-memory Architecture for RRAM-based Deep Neural Networks , to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018.
- Training Low Bitwidth Convolutional Neural Networks on RRAM , in Proceedings of the 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 2018, pp.117-122. pdf
- Rescuing Memristor-based Computing with Non-linear Resistance Levels , in DATE 2018, 2018, pp.407-412.
- Computation-Oriented Fault-Tolerance Schemes for RRAM Computing Systems , in Proceedings of the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017, pp.794-799. pdf slide
- TIME:A Training-in-memory Architecture for Memristor-based Deep Neural Network , in Design Automation Conference (DAC), 2017, pp.26:1-26:6. pdf slide
- A 462GOPs/J RRAM-Based Nonvolatile Intelligent Processor for Energy Harvesting IoE System Featuring Nonvolatile Logics and Processing-In-Memory , in IEEE Symposium on VLSI Circuits (VLSIC), 2017. pdf
- RRAM Based Learning Acceleration , in Compliers, Architectures, and Sythesis of Embedded Systems (CASES) invited talk, 2016, pp.1-2. pdf
- Switched by Input: Power Efficient Structure for RRAM-based Convolutional Neural Network , in Design Automation Conference (DAC), 2016, pp.125:1-125:6. pdf slide
- Low Power Convolutional Neural Networks on a Chip , in ISCAS, 2016, pp.129-132. pdf slide
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