Kaiyuan Guo (郭开元)

Kaiyuan Guo is a PhD candidate in the Department of Electronic Engineering at Tsinghua University. His research interests include hardware acceleration of deep learning and SLAM. Guo received a BS in electronic engineering from Tsinghua University.


Address: Room 4-101, Rohm Building, E.E. Dept., Tsinghua University, Beijing, China
Email: gky15☺mail·tNOSPAMMINGsinghua·edu·cn
Phone: +86-18810680604

Selected Publications

Journal Articles

  • Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Jincheng Yu, Junbin Wang, Song Yao, Song Han, Yu Wang, Huazhong Yang, Angel-Eye: A Complete Design Flow for Mapping CNN onto Embedded FPGA , in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol.37, No.1, 2018, pp.35-47. pdf
  • Kaiyuan Guo, Song Han, Song Yao, Yu Wang, Yuan Xie, Huazhong Yang, Software–Hardware Codesign for Efficient Neural Network Acceleration , in IEEE Micro, vol.37, No.2, 2017, pp.18-25. pdf

Conference Papers

  • Jincheng Yu, Kaiyuan Guo, Yiming Hu, Xuefei Ning, Jiantao Qiu, Huizi Mao, Song Yao, Tianqi Tang, Boxun Li, Yu Wang, and Huazhong Yang, Real-time object detection towards high power efficiency , to appear in DATE 2018, 2018, pp.704-708. pdf
  • Jincheng Yu, Yiming Hu, Xuefei Ning, Kaiyuan Guo, Jiantao Qiu, Yu Wang, Huazhong Yang, Instruction Driven Cross-Layer CNN Accelerator with Winograd Transformation on FPGA , in ICFPT 2017, 2017, pp.227-230. pdf slide
  • Jiantao Qiu, Jie Wang, Song Yao, Kaiyuan Guo, Boxun Li, Erjin Zhou, Jincheng Yu, Tianqi Tang, Ningyi Xu, Sen Song, Yu Wang, Huazhong Yang, Going Deeper with Embedded FPGA Platform for Convolutional Neural Network , in ACM International Symposium on FPGA, 2016, pp.26-35. pdf slide
  • Xijie Jia, Kaiyuan Guo, Wenqiang Wang, Yu Wang, Huazhong Yang, SRI-SURF: A Better SURF Powered by Scaled-RAM Interpolator on FPGA , in International Conference on Field-Programmable Logic and Applications (FPL), 2016, pp.1-8. pdf slide
  • Kaiyuan Guo, Lingzhi Sui, Jiantao Qiu, Song Yao, Song Han, Yu Wang and Huazhong Yang, Angel-Eye: A Complete Design Flow for Mapping CNN onto Customized Hardware , in IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016, pp.24-29. pdf
  • Wenqiang Wang, Kaiyuan Guo, Mengyuan Gu, Yuchun Ma, Yu Wang, A Universal FPGA-based Floating-point Matrix Processor for Mobile Systems , in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp.139 - 146. pdf

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